The present invention relates to a digital phase detector for occurring the transition of the extracted clock pulses at the center of the unit bit interval of the NRZ (nonreturn to zero) data.
In conventional circuits for bit synchronism, it is difficult to automatically adjust the transition of the clock pulses extracted from data to be at the center of the unit bit interval of the data. Therefore, they comprise an open loop-type control circuit which consists of an accurate phase complementary circuit, in order for the phases to be accurately complemented in retiming the data. However, it is necessary that such circuit has superior accuracy and good temperature characteristics of the constituting elements, because the retiming performance of the circuit depends upon the accuracy and the temperature characteristics of the constituting elements. Also, recently developed self-adjusting retiming circuits have a drawback of limiting the data bit-transmitting rate, because they frequently generate jitter and produce a phase information in the form of a pulse width.